next up previous contents
Next: Dynamic logic families Up: CMOS logic families Previous: CMOS logic families   Contents


Static logic families

The principal static families are:

Conventional static logic
It is the logic normally referred when speaking of static logic. A static circuit has the same number of NMOS and PMOS transistors, but the n and p branches are respectively one the dual of the other. As an example see figure 1.1,

Figure 1.1: Static and
\includegraphics[width=\myfigwidthm]{figures/cmos/and_schem.eps}

which represents a static ``and'' gate. It has two NMOS transistor connected in series and two PMOS connected in parallel.

The static logic is quite fast, does not dissipate power in steady state and has a very good noise margin.

Pseudo-NMOS
It is an evolution of the yet surpassed NMOS logic. It is obtained by substituting the whole PMOS branch in a static logic with a single PMOS transistor with its gate connected to ground. So this PMOS is always conducting and leads the output node to the high state. When the NMOS branch conducts also, then the output discharges, if the ratio among the NMOS and PMOS transistor is well designed.

This logic is cited here only for historical reason, since it is not so fast, it dissipates static power in a steady state (when the output is in the low state) and it is sensible to noise.

Pass-logic
The pass-logic is relatively new logic, and, for many digital designs, implementation in pass-transistor logic (PTL) has been shown to be superior in terms of area, timing, and power characteristics to static CMOS.
As an example see figure 1.2,

Figure 1.2: Pass transistor logic xor
\includegraphics[height=\myfigwidthm,angle=-90]{figures/cmos/xor_schem.eps}


next up previous contents
Next: Dynamic logic families Up: CMOS logic families Previous: CMOS logic families   Contents
marco+site@equars.com