=0pt
2=HE2
by =
7=8=18 by 1000 7 by8
=.001by 7 1=
1.051
=-2 -12112=-1000pt optimization of VLSI circuits involves
the optimization of single CMOS cell. In this chapter are
briefly reported the basic CMOS logic families, with their
pros and cons. The simple goal is to pick up
among the static and dynamic logic
families the most appealing for the use in vlsi circuits, and, in
some measure, the most actually used, and then apply to them the optimization
techniques shown in the next chapters.