Conclusions

The model of this chapter is suitable for the optimization application of chapter 5. It is able to compute the delay and the power consumption of CMOS structures with good accuracy and a consistent speed-up regarding to the HSPICE simulation taken as a reference.
In a real production design cycle, this model might be used for a first pre-optimization of some basic cell; then in the last steps of the design flow the optimization using a more accurate model for the delay (or power) evaluation must be used.