A simple model

=0pt 2=HE2 by = 7=8=18 by 1000 7 by8 =.001by 7 1= 1.051 =-2 -12112=-1000pt first model applied in the calculus of the delay in MOS circuits is the Elmore's model ([3]). It is a simple $RC$ delay model, and it is the basement of a switch MOS model (figure 2.1): the generic MOS is represented, during the ON state, by its dynamic resistance across the drain pin and the source pin, and the parasitic capacitances and resistances at the drain and source pins.

Figure 2.1: $RC$ MOS equivalence

If this simple MOS model is valid, then the Elmore's delay formula can be used in every structure containing some MOS. The Elmore's formula is appealing for its simplicity and its easy of use; however the accuracy of the formula can worsen in the deep sub-micron domain, since the modeling of a MOS through its resistance it is no more valid.

Since the use of Elmore's model is almost quite limited to comparisons with other models, of for introduction to delay modelling, section 2.1 presents here only the very basic of the Elmore's model and section 2.2 shows the conclusions about the use of this model for VLSI models.