- ... value
- This brief introduction is limited to systems
that have a single global clock, or one phase, intending here the word phase
as synonym of clock, and not as above as a synonym of working period. There
are systems that have two, or even four phase, but they are not introduced
here. The basic functioning, however, remains the same.
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- ...
problem
- The charge-sharing problem, or charge-redistribution, is a
problem that affects the dynamic logics. Basically the charge stored in an
precharged node node during the memory phase does not remain fully stored in it.
Let's think to a domino gate during the pre-charge phase, when the clock is
low. If there is one input in the n-block that is high, then its
corresponding transistor is conducting. The n-branch is
still not conducting, since the clocked NMOS transistor is not
conducting, but some charge from the precharged node can flow to others node
via the conducting transistors in the n-block. This redistribution of charge
is simply a charge of a capacitor partition and lead to a state of the
precharged node lesser than the high state.
This problem can produce logic errors, and surely diminishes the
noise margins of the cell.
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- ... contemporary
- This hypothesis is well supported by
simulations
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- ...

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- ... methods5
- The problem is always strictly non-linear.
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- ...
saturate6
- This is because they are the only that have a full voltage
swing at some node, e.g. the gate node the first, and the drain the last.
All the transistor in the middle of the chain are prevented to saturate
by the body-effect, that makes the saturation condition
, (or, better, the equation (3.3),
page
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impossible.
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- ... Theorem7
- iff
is a compact set, as is in
this context
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- ...
set8
- A set
is convex if
the segment
is totally contained in
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- ... gradient9
- Essentially with
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- ...Hessian10
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- ...
linear11
- This means that
with
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- ... it12
- The simplest circuit, the inverter, has
critical path, since a change in the input
from low to high involves the path comprising only the n-MOSFET,
while a change from high to low
involves the path comprising only the p-MOSFET.
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- ... of13
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- ... not14
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- ...15
- The reason why we want
to define a single value for the optimization of delay and, for example,
we do not apply the multi-objective methods of the following sections,
is that all the critical path delay are commensurable and they have the
same global behaviour (cfr. §5.2.3,
page
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- ... sum16
- This definition introduces further errors in the delay model,
since the conduction of the conducting path successive to the first one
does not start when the output of the first one is at its
, but
long before.
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- ... formula17
- It
is possible, however, after measuring a set of delay varying with widths,
to fit the results with an approximated formula, now in a closed form.
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- ... independent18
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- ... widths19
- The two dimensions representation of
figures 5.5, 5.6, 5.7 and 5.8 is only for the sake of simplicity
of the drawing. The convexity is still valid in multi-dimensional
representations.
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- ... path20
- In first
approximation the power consumption could be the sum of the power dissipated
by each critical path in a fully static CMOS circuit.
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- ...21
-
The same reasoning of note
4 (page
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- ... curve22
- It is a straight line in two dimensions,
a plane in three dimensions and an hyperplane in four or more dimensions, but
is always a convex function.
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- ... widths23
- See note 7, page
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- ... and24
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- ... optimizer2
- For a complete description
of the optimizer cad tool see chapter 6,
page
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- ... gate4
- See note a, (page
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- ... path5
- §5.1.1, page
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- ... optimization6
- §4.1.1.2, page
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- ... deviation7
- The
standard deviation of a number
of samples
is defined as
, where
,
, is the
arithmetic mean of the
samples.
It is a measure
of the spreading of the samples around the mean.
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- ... numbers8
- The case ``Delay=0% Power=100%''
has not been included, since this kind
of optimization leads to the trivial
result of all the transistor at the minimum width
(cfr. §5.2.2.2, page
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