... value% latex2html id marker 23083
\setcounter{footnote}{1}\fnsymbol{footnote}
This brief introduction is limited to systems that have a single global clock, or one phase, intending here the word phase as synonym of clock, and not as above as a synonym of working period. There are systems that have two, or even four phase, but they are not introduced here. The basic functioning, however, remains the same.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... problem% latex2html id marker 23094
\setcounter{footnote}{2}\fnsymbol{footnote}
The charge-sharing problem, or charge-redistribution, is a problem that affects the dynamic logics. Basically the charge stored in an precharged node node during the memory phase does not remain fully stored in it. Let's think to a domino gate during the pre-charge phase, when the clock is low. If there is one input in the n-block that is high, then its corresponding transistor is conducting. The n-branch is still not conducting, since the clocked NMOS transistor is not conducting, but some charge from the precharged node can flow to others node via the conducting transistors in the n-block. This redistribution of charge is simply a charge of a capacitor partition and lead to a state of the precharged node lesser than the high state.

This problem can produce logic errors, and surely diminishes the noise margins of the cell.

.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... contemporary% latex2html id marker 23297
\setcounter{footnote}{3}\fnsymbol{footnote}
This hypothesis is well supported by simulations
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... $ V_{DS} = V_{GS}-V_{T}$% latex2html id marker 23498
\setcounter{footnote}{4}\fnsymbol{footnote}
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... methods5
The problem is always strictly non-linear.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... saturate6
This is because they are the only that have a full voltage swing at some node, e.g. the gate node the first, and the drain the last. All the transistor in the middle of the chain are prevented to saturate by the body-effect, that makes the saturation condition $ V_{DS}=V_{GS}-V_T$, (or, better, the equation (3.3), page [*]) impossible.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... Theorem7
iff $ X$ is a compact set, as is in this context
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... set8
A set $ X\subset \mathbb{R}^n$ is convex if $ \forall \mathbf{x},\mathbf{y}\in X$ the segment $ [ \mathbf{x},\mathbf{y}]$ is totally contained in $ X$
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... gradient9
Essentially with $ \dfrac{\partial f}{\partial
x_i}(\mathbf{x})\approx\dfrac{f(\mathbf{x}+\Delta\mathbf{x})-f(\mathbf{x})}{\Delta\mathbf{x}}$
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
...Hessian10
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... linear11
This means that $ \lim_{k\rightarrow\infty}\frac{f(\mathbf{x}^{k+1})}{f(\mathbf{x}^k)}=a,$ with $ 0\leq a\leq 1$
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... it12
The simplest circuit, the inverter, has $ 2$ critical path, since a change in the input from low to high involves the path comprising only the n-MOSFET, while a change from high to low involves the path comprising only the p-MOSFET.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... of13
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... not14
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
...15
The reason why we want to define a single value for the optimization of delay and, for example, we do not apply the multi-objective methods of the following sections, is that all the critical path delay are commensurable and they have the same global behaviour (cfr. §5.2.3, page [*])
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... sum16
This definition introduces further errors in the delay model, since the conduction of the conducting path successive to the first one does not start when the output of the first one is at its $ 50\%$, but long before.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... formula17
It is possible, however, after measuring a set of delay varying with widths, to fit the results with an approximated formula, now in a closed form.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... independent18
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... widths19
The two dimensions representation of figures 5.5, 5.6, 5.7 and 5.8 is only for the sake of simplicity of the drawing. The convexity is still valid in multi-dimensional representations.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... path20
In first approximation the power consumption could be the sum of the power dissipated by each critical path in a fully static CMOS circuit.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
...21
The same reasoning of note 4 (page [*]) applies here.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... curve22
It is a straight line in two dimensions, a plane in three dimensions and an hyperplane in four or more dimensions, but is always a convex function.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... widths23
See note 7, page [*].
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... and24
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... optimizer2
For a complete description of the optimizer cad tool see chapter 6, page [*].
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... gate4
See note a, (page [*]).
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... path5
§5.1.1, page [*].
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... optimization6
§4.1.1.2, page [*]
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... deviation7
The standard deviation of a number $ N$ of samples $ x_i$ is defined as $ \sigma^2=\tfrac{\sum_{i=1}^{N}(x_i-m)^2}{N}$, where $ m$, $ m=\tfrac{\sum_{i=1}^N
x_i}{N}$, is the arithmetic mean of the samples.
It is a measure of the spreading of the samples around the mean.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
... numbers8
The case ``Delay=0% Power=100%'' has not been included, since this kind of optimization leads to the trivial result of all the transistor at the minimum width (cfr. §5.2.2.2, page [*])
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.